Turned-off digital subcircuits that are started after the application of a supply voltage are usually in an undefined or unknown operating state after said application. An error-free function is accordingly not ensured. For this reason, sequential digital circuits are usually formed together with reset circuits or reset generators that put the circuit into a defined start state when the supply voltage is applied to said circuit.
In this case, it must be taken into account that generally external parameters, for example temperature ranges or process fluctuations, and also a rise in the supply voltage up to the required value, are not known beforehand, so that the function of the reset generator or reset circuit has to be ensured over a wide parameter range. In addition, the reset generator should generate the reset signal as far as possible for as long as needed compensate for an impairment of the reset signal on the path to the individual circuit parts. Such an impairment or degradation may occur due to the fact that the supply voltage is not yet present at a sufficiently high level for all of the circuit parts. After the resetting of the digital circuit parts, the reset generator should consume as little current as possible, if any at all. Moreover, it is desirable for the reset generator to become active again immediately after a dip in the supply voltage and to generate a new reset pulse.
Reset circuits usually operate with low-pass filtering to generate an auxiliary signal from a rising supply voltage. In this case, the rise of the auxiliary signal is lower than that of the supply voltage itself. After some time, the supply voltage reaches a value at which the reset circuit itself can operate in a defined manner. However, owing to its slower rise, the auxiliary signal still remains below the supply voltage. The reset circuit compares the level of the auxiliary signal with a defined voltage threshold and outputs a reset signal until the voltage threshold is reached. In the event of the threshold being exceeded, the reset circuit withdraws the reset signal. In practical cases of this solution, the reset signal usually follows the rising supply voltage until it is cleared by the reset circuit.
A fundamental problem arises if the supply voltage rises very slowly. As a result, the low-pass filter loses its effect and the auxiliary signal and the supply voltage have a similar rate of rise and an instance of the threshold voltage being exceeded can be detected only with difficulty. In such a case, the reset circuit-would turn off the reset signal if the supply voltage is high enough in order that the reset circuit itself can operate in a defined manner. However, the supply voltage may still be too low for other circuits, so that they cannot correctly evaluate the reset signal and consequently attain an undefined state. Moreover, it can happen that the reset circuit generates no reset signal whatsoever in the event of an excessively slow rise. In order to ensure that the auxiliary signal rises significantly more slowly than the supply voltage itself even in the event of a slow rise in the supply voltage, it is necessary to dimension the low-pass filter with a very large time constant. However, such low-pass filters can be realized only in complex fashion and with difficulty in integrated circuits and lead to high costs.
A further problem arises in an integrated circuit that has a plurality of supply voltage domains and is supplied by external circuitry from a plurality of different supply voltage sources. Although it can be ensured that the different sources are turned on virtually simultaneously, the rise in the supply voltages may proceed at different rates on account of different connected load impedances. Therefore, at each supply voltage domain, a dedicated reset circuit should be provided which detects the voltage rise and correspondingly outputs a reset pulse to the connected subcircuit. However, the space taken up for such a solution is disproportionately high and it has been proposed to provide only one reset circuit, which emits a reset pulse until it is ensured that all the supply voltage domains are supplied with the voltage required for operation. However, since many circuits have a high shunt current when a reset signal is present, such a solution with a reset signal that is present continuously and for a long time leads, during this time duration, to a high power consumption and a high continuous current which, under certain circumstances, cannot be provided by the supply source for this time.
Document DE 19534785 C1 shows a circuit for generating an enable signal. In this case, a delay device is provided, which temporally delays the reset signal until connected elements have reached a stable state.